How Digital to Analogue Conversion WorksA short, but technical guide on how Digital to Analogue Conversion (DAC) electronics works in simple circuits to convert a digital signal.
Assuming that the data stream has been received, the time slot being used must be located and the serial bits extracted and loaded into a store to form a parallel group. Following error checking and/or correcting the digital word must be returned to its analogue equivalent. There are many ways to perform this task, but the most common for binary-coded signals is to use an R/2R ladder network. This in practice uses many identical resistors fabricated on the same silicon substrate to ensure that they all react in the same way to environmental changes.
The parallel word is applied to the inputs of the ladder network "A", "B", "C" and "D" such that any logic "0" is represented as 0 volts (ground) and logic "1" is represented by +3 volts (for example). A logic "I" on input terminal "D" will cause a current to flow into the network, where I = V/R = 1 ㎃.
At junction "4" this will split equally to leave half the input current (500 ㎂) to flow through the 1 kΩ load resistor and therefore give an output of 0.5 volts.
A logic "1" input at terminal "C" will also create an input current of 1 ㎃ which will split at junction "3" with 500 ㎂ flowing towards Junction "4". Here the current will split again such that half the current entering the junction will flow into the load resistor. This 250 ㎂ current will generate an output voltage of 0.25 volts.
A logic "1" at terminal "B" gives an input current of 1 ㎃ which will split in half at junction "2" leaving 500 ㎂ going on to Junction "3" where it will halve again to leave 250 ㎂ going on to Junction "4" wherein it halves again to leave 125 ㎂ going into the load and so generate 0.125 volts output.
Finally, logic "1" on input terminal "A" again causes an input current of 1 ㎃ which will halve at the junction "1". The resulting 500 ㎂ arrives at Junction "2" and is again halved to leave 250 ㎂ going on to Junction "3". Half of this will go on to Junction "4" where again it will split in half to leave 62.5 ㎂ in the load and hence an output voltage of 0.0625 volts.
This ladder can be expanded to accommodate any number of input bits and each input will cause a binary weighted output voltage. By applying the received parallel data words to the input terminals of a R/2R ladder, an output voltage will be created which will be a step version of the original analogue signal. However, suitable filters can remove most of the step effects caused by the digitising process to leave a perfectly acceptable representation of the original analogue signal.
In the case of multiplexed phone circuits, the output will be electronically routed to the required destination but all will use the same ladder network and associated circuitry. This means that the cost of reproducing multiple signals is only very slightly more than operating on a single channel. If two signals are required simultaneously then two complete channels of D to A must be provided regardless of cost.
In "real" phone systems using digital signalling, the quality can be improved by several techniques.
Companding - Is used to compress the dynamic range of the analogue signal such that loud and quiet signals fully utilise the available number of coding levels during the A to D process. The original signal levels are restored following D to A conversion so the output "sounds" correct.
Weighting - The voltage level between adjacent codes does not have to be the same. Analysis of speech waveforms indicates that changes occur more rapidly in some amplitude regions than others and it would, therefore, be more efficient to have more digital levels available in such regions.
DSP - Digital signal processing can be used once the analogue signal has been converted into digital form. Modern computer speed and power will allow some intelligent processing of the data before its being re-converted back into the analogue output.
